/*--------------------------------------------------------------------------
Example.c
****************************************
**  Copyright  (C)    2021-2022   **
**  Web:              http://rothd.cn   **
****************************************
--------------------------------------------------------------------------*/

#include "MC3172.h"


void GPCOM_UART_EXAMPLE(u32 gpcom_sel)
{
    INTDEV_SET_CLK_RST(gpcom_sel,(INTDEV_RUN | INTDEV_IS_GROUP0 | INTDEV_CLK_IS_CORECLK_DIV4));

    GPCOM_SET_IN_PORT(gpcom_sel,(GPCOM_RXD_IS_P2));
    GPCOM_SET_OUT_PORT(gpcom_sel,( \
            GPCOM_P0_OUTPUT_DISABLE | GPCOM_P3_OUTPUT_ENABLE | GPCOM_P2_OUTPUT_DISABLE | GPCOM_P1_OUTPUT_DISABLE| \
            GPCOM_P0_IS_HIGH        | GPCOM_P3_IS_TXD        | GPCOM_P2_IS_HIGH        | GPCOM_P1_IS_HIGH \
                      ));

    GPCOM_SET_COM_MODE(gpcom_sel, GPCOM_UART_MODE);

    GPCOM_SET_COM_SPEED(gpcom_sel, 12000000, 115200);

    GPCOM_SET_OVERRIDE_GPIO(gpcom_sel, ( \
            GPCOM_P2_OVERRIDE_GPIO | GPCOM_P2_INPUT_ENABLE | \
            GPCOM_P3_OVERRIDE_GPIO \
                                              ));
#ifdef TEST_ONLY_UART_TX
    while(1){
        while(GPCOM_TX_FIFO_FULL(gpcom_sel));
        for (u32 var = 0; var < 90; ++var) {
            NOP();
        }
        GPCOM_PUSH_TX_DATA(gpcom_sel, 0x31);
    }

#else
    u8 rx_data_rp = 0;
    u8 rx_data = 0;
    rx_data_rp = GPCOM_GET_RX_WP(gpcom_sel);
    while(1) {
         if(rx_data_rp != (GPCOM_GET_RX_WP(gpcom_sel))){
              rx_data = GPCOM_GET_RX_DATA(gpcom_sel, rx_data_rp);
              GPCOM_PUSH_TX_DATA(gpcom_sel, rx_data);
              rx_data_rp++;
              rx_data_rp &= 0x0f;
         }
    }
#endif
}


void GPCOM_SPI_EXAMPLE(u32 gpcom_sel)
{
    volatile u8 rx_data_temp[8];

    INTDEV_SET_CLK_RST(gpcom_sel,(INTDEV_RUN | INTDEV_IS_GROUP0 | INTDEV_CLK_IS_CORECLK_DIV2));

    GPCOM_SET_IN_PORT(gpcom_sel,(GPCOM_MASTER_IN_IS_P3));
    GPCOM_SET_OUT_PORT(gpcom_sel,( \
            GPCOM_P0_OUTPUT_ENABLE  | GPCOM_P0_IS_HIGH \
          | GPCOM_P1_OUTPUT_ENABLE  | GPCOM_P1_IS_MASTER_CLK \
          | GPCOM_P2_OUTPUT_ENABLE  | GPCOM_P2_IS_MASTER_OUT \
          | GPCOM_P3_OUTPUT_DISABLE | GPCOM_P3_IS_HIGH \
                      ));

    GPCOM_SET_COM_MODE(gpcom_sel,(GPCOM_SPI_MASTER_MODE3 | GPCOM_TX_MSB_FIRST | GPCOM_RX_MSB_FIRST));

    GPCOM_SET_COM_SPEED(gpcom_sel, 24000000, 1000000);

    GPCOM_SET_OVERRIDE_GPIO(gpcom_sel, ( \
            GPCOM_P0_OVERRIDE_GPIO | \
            GPCOM_P1_OVERRIDE_GPIO | \
            GPCOM_P2_OVERRIDE_GPIO | \
            GPCOM_P3_OVERRIDE_GPIO | GPCOM_P3_INPUT_ENABLE  \
                                              ));

    u8 tx_data_wp = 0;
    u8 rx_data_rp = 0;
    tx_data_wp = GPCOM_GET_TX_WP(gpcom_sel);
    rx_data_rp = GPCOM_GET_RX_WP(gpcom_sel);

    while(1){

        GPCOM_SET_OUT_PORT(gpcom_sel,( \
                GPCOM_P0_OUTPUT_ENABLE  | GPCOM_P0_IS_LOW \
              | GPCOM_P1_OUTPUT_ENABLE  | GPCOM_P1_IS_MASTER_CLK \
              | GPCOM_P2_OUTPUT_ENABLE  | GPCOM_P2_IS_MASTER_OUT \
              | GPCOM_P3_OUTPUT_DISABLE | GPCOM_P3_IS_HIGH )\
                          );

        GPCOM_SEND_TX_DATA(gpcom_sel, tx_data_wp + 0, CORE_CNT);
        GPCOM_SEND_TX_DATA(gpcom_sel, tx_data_wp + 1, CORE_CNT);
        GPCOM_SEND_TX_DATA(gpcom_sel, tx_data_wp + 2, CORE_CNT);
        GPCOM_SEND_TX_DATA(gpcom_sel, tx_data_wp + 3, CORE_CNT);

        tx_data_wp+=4;
        GPCOM_SEND_TX_WP(gpcom_sel, tx_data_wp);
        while(!(GPCOM_TX_FIFO_EMPTY(gpcom_sel))){};

        while(rx_data_rp != GPCOM_GET_RX_WP(gpcom_sel)){
            rx_data_temp[rx_data_rp & 0x7] = GPCOM_GET_RX_DATA(gpcom_sel, rx_data_rp);
            rx_data_rp += 1;
            rx_data_rp &= 0xf;
        };

        GPCOM_SET_OUT_PORT(gpcom_sel,( \
                  GPCOM_P0_OUTPUT_ENABLE  | GPCOM_P0_IS_HIGH \
                | GPCOM_P1_OUTPUT_ENABLE  | GPCOM_P1_IS_MASTER_CLK \
                | GPCOM_P2_OUTPUT_ENABLE  | GPCOM_P2_IS_MASTER_OUT \
                | GPCOM_P3_OUTPUT_DISABLE | GPCOM_P3_IS_HIGH \
                          ));
    }

}

